Abstract:
The traditional pulse width modulation techniques cause high power loss in the power devices of the inverter. This paper presents a modified equal loading bus clamping pulse width modulation technique, where the modulating voltage is clamped to its dc bus voltage for 120 degree in each half cycle of the fundamental period. Consequently, the switching loss of the inverter is greatly reduced, which in turn increases the inverter overall efficiency and active life time. Also, the total harmonic distortion of the converter is also improved. Furthermore, the dc bus voltage utilization is around 81.6%. The improved performance of the proposed technique is validated by simulation in MATLAB/Simulink.
