dc.contributor.author | Qun, Ng Hui | |
dc.contributor.author | Khalib, Z.I.A | |
dc.contributor.author | Warip, M. N. | |
dc.contributor.author | Elobaid, M. Elshaikh | |
dc.contributor.author | Rahman, Mostafijur | |
dc.contributor.author | Zahri, N.A.H. | |
dc.contributor.author | Saad, Puteh | |
dc.date.accessioned | 2018-09-24T06:48:40Z | |
dc.date.accessioned | 2019-05-27T09:59:30Z | |
dc.date.available | 2018-09-24T06:48:40Z | |
dc.date.available | 2019-05-27T09:59:30Z | |
dc.date.issued | 2017-01-05 | |
dc.identifier.uri | http://hdl.handle.net/20.500.11948/3301 | |
dc.description.abstract | Hyper-threading (HT) technology allows one thread to execute its task while another thread is stalled waiting for shared resource or other operations to complete. Thus, this reduces the idle time of a processor. If HT is enabled, an operating system would see two logical cores per each physical core. This gives one physical core the ability to run two threads simultaneously. However, it does not necessarily speed up the performance of a parallel code twice the number of physical cores. This happens when two threads are trying to access the shared CPU resource. The instructions could only be executed one after another at any given time. In this case, parallel CPU-bound code could attain a little improvement in terms of speedup from HT on a quad-core platform, which is Intel i5-2410M@2.30GHz. Full Text Link: http://doi.org/10.1109/ICED.2016.7804711 | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE Xplore | en_US |
dc.subject | Algorithm design and analysis | en_US |
dc.subject | Instruction sets | en_US |
dc.subject | Parallel processing | en_US |
dc.subject | Multicore processing | en_US |
dc.subject | Heuristic algorithms | en_US |
dc.subject | Scalability | en_US |
dc.subject | Parallel programming | en_US |
dc.title | Hyper-threading technology: Not a good choice for speeding up CPU-bound code | en_US |
dc.type | Article | en_US |